The prior art describes numerous package configurations for semiconductor chips. In fact, more recently, the cost of such packages has, in various instances, become greater than the cost of the chips. In order to overcome this cost problem, a technique known as TAPE AUTOMATED BONDING (TAB) packaging has been introduced. It is especially useful with lower costs, relatively low powered dissipation integrated circuits. TAB packaging involves the use of a web of material, generally called a carrier tape such as a polyimide, to carry electrically conductive leads which provide connections between the chip and a printed circuit card. The carrier chip is incremented past a number of operating stations, one of which places a chip on an inner-cluster of conductive leads. The inner-cluster is then bonded to connecting pads on the chip. The tape is then incremented to a station where the active face of the chip, including the inner-lead bonds, may be coated with a passivating material. The tape is then moved to a further station where the outer cluster of leads on the carrier tape is severed from the tape. The tape/chip combination is then registered with conductive pads residing on an underlying circuit board or card and the outer leads are bonded to the conductive pads. The circuit board or card/chip combination is then available for additional processing. TAB packaging is relatively inexpensive compared to the other package configurations now presently available.
One of the drawbacks of TAB packaging is that its use has for the most part been limited to low power dissipation circuits, since it is quite difficult to apply heat sinks to a TAB package structure. The primary, if not only, physical interconnection between a chip and an underlying circuit board in a TAB package is via bonds between the tape-carried outer leads and the underlying conductive pads on the circuit board. Attaching a heat sink to the chip in a TAB package is somewhat impractical since, in the event of mechanical vibration or strain, the chip will tend to pull away from the circuit board or card and the exerted forces may exceed the ultimate rupture strength of the lead bonds or the tape itself.
Another problem associated with employing heat sinks with TAB packages is supporting the heat sinks in a relatively inexpensive manner, while still retaining good heat dissipation characteristics. Physical interconnections to supports that are separate from the underlying circuit board have made removal of the circuit board difficult. Attempts to provide physical interconnections to the board itself have resulted in different problems. For instance, circuit boards are often subject to flexure when they are inserted or withdrawn from mating connectors, which can cause cracking, breaking or failure of inflexible physical connection to a heat sink.
Although, various prior art suggestions to provide heat dissipation have been employed, such are primarily suitable for relatively low power dissipating packages whereby the chips dissipate one watt or less per chip. For the most part, TAB structures that are designed to dissipate at least two watts per chip, have not had entirely satisfactory heat dissipating techniques provided to the structure. This is especially true when attempting to cool the underlying chips by simple natural convection airflow as contrasted to forced airflow or refrigeration. Even heat dissipating techniques that have been somewhat successful for the relatively high power dissipation circuit have not been entirely satisfactory. For instance, such are not readily removable from the chip without causing damage to the chip or circuitry or requiring higher head space than desired.